12
Dec
XinPal has joined the UALink Consortium alongside industry leaders such as AMD, Google, and Microsoft to drive the development and adoption of UALink, the next-generation interconnect technology poised to revolutionize AI workloads.
Eric Yuan, Research and Development Vice President of XinPal, said, "We are thrilled to join the UALink Consortium and collaborate with industry leaders to drive the future of AI interconnect technology." UALink has the potential to revolutionize AI by enabling unprecedented levels of performance and scalability. XinPal is committed to developing cutting-edge solutions that leverage UALink's capabilities to empower the next generation of AI applications.
The exponential growth of AI models demands a new industry standard for AI interconnects. UALink addresses this need by enabling massive bandwidth, ultra-low latency, and unparalleled scalability. This technology adopts innovative data and transaction layer optimization, significantly reducing die area, power consumption, and overhead. Compared with traditional interconnect technologies such as PCIe and NVLink, UALink delivers significant improvements to the efficiency of AI training and inference.
The UALink Consortium is rapidly advancing the release of the UALink 1.0 specification, expected in the first quarter of 2025. This milestone will enable XinPal and other consortium members to deliver innovative solutions that leverage UALink's capabilities across a wide range of applications, including AI training and inference, high-performance computing, and cloud data centers. XinPal is committed to developing high-speed switch chips that will maximize UALink's potential, contributing to a thriving AI ecosystem and accelerating the development of groundbreaking AI applications.
